MOSFET Threshold Voltage Calculator

Threshold voltage is the gate-source voltage at which a MOS structure forms a strong inversion layer capable of conducting between source and drain. It is not a perfectly sharp on-off boundary, because measurable subthreshold current exists below it, but it remains one of the most important parameters in digital timing, analog biasing, leakage control, and device fabrication. Threshold depends on material properties, oxide geometry, substrate doping, terminal bias, temperature, and trapped charge. This calculator uses a standard idealized NMOS body-effect model. Gate oxide capacitance per unit area is oxide permittivity divided by oxide thickness. A thinner oxide produces larger capacitance and stronger electrostatic gate control. The Fermi potential is derived from thermal voltage and the logarithm of acceptor doping relative to intrinsic carrier concentration. The body-effect coefficient combines silicon permittivity, electronic charge, substrate concentration, and oxide capacitance. At zero source-body bias, the threshold estimate is flat-band voltage plus twice the Fermi potential plus the depletion-charge term. Applying a positive source-to-body voltage increases depletion depth and therefore raises threshold voltage. This is the body effect. The model assumes a uniformly doped p-type silicon substrate, silicon dioxide with relative permittivity 3.9, silicon relative permittivity 11.7, and an intrinsic carrier concentration of 1.45 × 10¹⁶ per cubic metre. Doping entered per cubic centimetre is converted internally to SI units. Flat-band voltage captures the work-function difference and effective oxide charge. It is often negative for an NMOS process but varies widely with gate material, substrate, fixed charge, and manufacturing details. Use a value from process documentation, a fitted device model, or a carefully characterized capacitor. Guessing this input can shift the final threshold substantially even when oxide and doping values are precise. This equation is useful for education, process exploration, and first-order comparisons, not for signing off a fabricated design. Modern short-channel devices exhibit drain-induced barrier lowering, quantum confinement, nonuniform profiles, poly depletion, mobility effects, and temperature-dependent intrinsic concentration. Production compact models account for these details and are calibrated to measurements. Also note that threshold extraction methods differ: constant-current, linear extrapolation, and transconductance methods may report different values for the same transistor. Treat the result as a physically informed estimate and verify it against the relevant process model.